SCU_rework
Document the SCU_rework/ISOLTS usage
Setting up an ISOLTS system.
ISOLTS runs on a 2-CPU system with specially configured memory. To emulate this, it is necessary to:
- Modify the Multics config deck to a 2 CPU configuration.
- Use an ISOLTS base_system.ini that correctly configures the 2nd CPU and memory.
- Add an HFED account (Odd; this used to be needed).
- Use a boot script that configures both CPUs.
- Use a boot script that sets the hpsa's that HFED needs.
Get the ISOLTS compatible source code:
git checkout SCU_rework.
cd src/dps8
Create 'Makefile.local' containing:
TESTING=1
CFLAGS += -DISOLTS
Build:
make clean all
We need a 12.6e disk and boot tape; unpack QuickStart_MR12.6e.zip
unzip <wherever>/QuickStart_MR12.6e.zip
cp QuickStart_MR12.6e/root.dsk .
cp QuickStart_MR12.6e/12.6eMULTICS.tap . .
'isolts_setup.ini' adds a second CPU to the config deck and renames the resulting root.dsk to isolts.dsk
./dps8 isolts_setup.ini
'isolts_boot.ini' copies isolts.dsk to root.dsk and boots.
Setup the HFED project:
./dps8 isolts_boot.ini
(When it has finished booting:)
ATTN
admin
cwd >udd>sa>a
cv_pmf HFED
install HFED.pdt
ATTN
(Wait for install message)
ATTN
ame
logout * *
ATTN
(Wait for daemons to logout)
ATTN
shut
(Wait for BCE prompt)
ATTN
die
y
isolts_boot.ini has copied the isolts.dsk over root.dsk and updated root.dsk. Save the updates to the reference disk:
mv root.dsk isolts.dsk
Running ISOLTS:
./dps8 isolts_boot.ini
In another window:
telnet localhost 6180
<enter>
enterp * HFED
fed
(wait for ??? prompt)
isolts
test cpu b
On the console, wait for permission request, then:
ATTN
x oqr grant
ATTN
wait for reconfiguration request. then:
ATTN
x oqr done
ATTN
Back in the telnet window, you should see ISOLTS running the Primitive Functions tests and reports:
asking operators permission to test cpu "b" using memory "b"
permission granted
asking operator to manually reconfigure cpu b
reconfiguration complete
start pft 01c
*** end 01c, next 01z ***
*** end 01z, next 02a ***
*** end 02a, next 02b ***
*** end 02b, next 03b ***
*** end 03b, next 04b ***
*** end 04b, next 04c ***
*** end 04c, next 04d ***
*** end 04d, next 04e ***
*** end 04e, next 04f ***
*** end 04f, next 05c ***
*** end 05c, next 061 ***
prom data indicates following system
bytes 0-33
model serial date
dps8/70m exx 020
bytes 34-40
processor 6000,l66 or dps
bcd options 1
dps options 1
8k cache
mult options
cpl/npl
port speed=fast cm
ou speed=fast ou
hexadecimal option
rscr option
bytes 50
gcos lockout bytes
gcos3
gcos8
cp6 1
multics
note test prom will cause invalid
results if it contains only data
patterns example= 01010101
multics pas executive rev. b.2 062287
rsw test
check visually
data switches = 024000717200
configuration switches =
ports(a-b-c-d) 002042002002
ports(e-f-g-h) 000000000000
port bits- a/e=0-8 b/f=9-17 c/g=18-26 d/h=27-35
address assignment = bits 0-2, 9-11, 18-20, 27-29
port enable = bits 3,12,21,30
initialize control = bits 4,13,22,31
interlace enable = bits 5,14,23,32
memory size = bits 6-8, 15-17, 24-26, 33-35
miscellaneous switches(rsw,2) = 010120714001
fault base=6-12 bar mode=17 processor id.=26-33
processor no.=34-35
miscellaneous switches(rsw,4) = 000000000000
ports(a thru h) interlace size bits-
a=13 b=15 c=17 d=19 e=21 f=23 g=25 h=27
ports(a thru h) half/full size bits-
a=14 b=16 c=18 d=20 e=22 f=24 g=26 h=28
the above processor identification code from the
miscellaneous switches(rsw 000002) indicates a
******************************************
* restrictions-no scu memory interlace *
******************************************
* model dps-8/70m cpu in operation*
* cpu installed options include... *
* 8k cache mem *
* *
*options?
Set the test options we want:
type
Start the tests at the top:
mode
ISOLTS starts running tests:
*options?type
*options?mode
pm700 rev b hstry reg/mode reg 042882
*** an error has occurred ***
*options?
Type 'derr' to see the message text:
derr
*options?derr
isolts error message sequence # 288 logged at 06/10/16 0652.9 pst Fri for cpu
\cb using memory b
************************* hstry reg/mode reg **************************
pm700 test-02b load &store bar-000776
***dsbr*** addr= 00017042 bnd= 00000 u= 1 stack= 0000
test start 103220 patch 104021 subtest loop point 103473
verification of instructions lcpr (tags 03,04,07),
scpr (tags 00,10,06,20,40) & loading of mode & historyregister.
location 103577 112634452020 instruction is scpr
prime results c(y) c(y+1) mode
s/b 777777777777 777777777777 000000000000
was 777777777777 777777777777 000000000050
function in error - the contents of the stored cu-hrshould be all one's each lo
\ccation.
hint - check the following
cu-hr board for "force-one".
input signals.
dlcpr-tag7.
$ar-ict
cu-hr counter.
absolute memory
112630 112630 777777
\c777777 777777777777 777777777777 777777777777
\014
locations 112640 through 113017 all contain 77777777777
\c7
the contents of the stored cu-hrshould be all one's each location.
Using ISOLTS
'tstnnn' run test nnn.
'derr' display the error message
The commands 'seq' and 'mode' both stat tests, but at different spots:
- 'seq' starts at ps702
- 'mode' starts at pm700
- 'type' sets long error messages
- 'atype' sets short error messages
- 'quit'
Optional: patch test to skip the operator interaction
Start the system:
./dps8 isoslts_boot.ini
Telnet in and login:
l Repair -cpw
repair
Repair
Repair
ac x >ldd>tools>s>bound_tolts_.s isolts_.pl1
qedx
r isolts_.pl1
/opr_com/
(should show: "if opr_com (cpu_tag, scu_tag) then ...")
d
d
w
q
pl1 -ot isolts_
cp >ldd>tools>o>bound_tolts_.archive
ac ud bound_tolts_ isolts_
bind bound_tolts_
hp_delete >tools>bound_tolts_
cp bound_tolts_ >tools>bound_tolts_
hpsrb >tools>bound_tolts_ 1 5 5
logout
Shut the system down.
Copy root.dsk to the reference disk, saving the change.
cp root.dsk isolts.dsk
Now isolts will run without asking the operator for permission or help.