CAC 2021-12-10
Reverse engineering DN6600 memory management
* setptw
* converts an 18 bit absolute address to a 15 bit virtual
* address and sets up the page table entry in the cpu page
* table. this routine is only required if more than 32K of
* memory is configured for a dn6670. a 'tra -1' is stored into
* setptw+1 by init if otherwise.
*
* input:
* a reg - 18 bit absolute address
*
* output:
* a reg - 15 bit virtual address
*
* modified registers: none
*
************************************************************************
rem
rem a 'tra -1,*' is stored in setptw+1 by init if
rem only 32k is configured
setptw subr ptw,(inh,x2) cannot allow interruptions
ldx2 a.v001-*,* .crpte
tsy setpte-*
ora l.v001-* concatenate with window address
return setptw all done
a.v001 ind .crpte
l.v001 vfd 18/window
rem the subr macro should be the first statement in a
rem subroutine. it creates a zero word to store the
rem address into, some register save instructions
rem and it contains the register restore instructions.
rem the first argument to the macro should be a unique
rem 3 character (or less) string. this character string
rem will be used in building the names of places to store
rem specified registers so that the stored registers may
rem be referenced by the subroutine. names are of the form
rem xxxsn where xxx is the 3 character string, the letter
rem s, and n where n is the register name, x1, x2, x3, a
rem q, or i (indicators). the registers to be saved
rem are specified in parens as the second argument. if
rem the character string 'inh' is one of the names, a
rem sti followed by an inh will be the first two instr-
rem uctions generated and the last will be an ldi before
rem returning to the caller.
000475 cptp set 317 cpu page table pointer
000701 .crcpt set 449 address of cpu page table
000702 .crpte set 450 address of variable cpu page table entry
window bool 77400 base address of paged memory
bwndow bool 77000 base address of buffer window
************************************************************************
*
* setpte
* common subroutine used to set a page table entry
*
* input:
* a reg - 18 bit absolute address
* x2 - address of page table entry
*
* output:
* a reg - low-order 8 bits of virtual address (offset in page)
*
************************************************************************
rem
setpte subr spt
sta sargsv-* save to provide offset
iana -256 get page number
iora pte.a turn on active bit
sta 0,2 put in relevant page table entry
lda sargsv-* get page offset
iana 255
return setpte
pte.r bool 200 page table entry read only bit
pte.s bool 100 page table entry security bit
pte.a bool 40 page table entry active bit
lda l.t002-* (=32768) yes. calculate last address in lower 32k
iaa -1
sta istpcl-* stops memory clear loop
iaa -256 account for paging window
iaa -256 and buffer window
sta a.t007-*,* (mvplmm) set lower memory maximum address
*
* check pager operation
*
ldx1 l.t009-* get address of loc. 0
lda 0,1 save its contents
sta itloc0-*
ila -1 put something recognizable there
sta 0,1
ldx1 l.t004-* (window) base of window
stz 0,1 clear test cells
stz -256,1
ldx3 a.t009-*,* (.crpte)
lda l.t006-* (=o100040) init page table to window page 77000
sba l.t003-* (=o400)
sba l.t003-* (=o400)
sta 0,3
lda a.t006-*,* (.crcpt) init cpu pager
sta a.t004-*,* (cptp)
ila -1 lets see where this goes
sta 0,1 store test value
stz 0,3 disable pager
lda 0,1 this is the real 77400, has it changed?
tnz itl120-* yes. bad news
lda -256,1 this is where store should go
icmpa -1 is it correct?
tnz itl120-* no. bad news
l.t002 dec 32768
istpcl oct 0
a.t007 ind mvplmm lower memory maximum address (in utilities)
l.t009 oct 0
itloc0 bss 1
l.t004 vfd 18/window
a.t009 ind .crpte
l.t006 vfd 10/128,3/1,5/0
l.t003 oct 400
a.t006 ind .crcpt
a.t004 ind cptp
page revision: 0, last edited: 11 Dec 2021 01:21