CAC 2020-04-04

Disassembling T&D block 16 CIOC

First CIOC:

DBG(66979126)> CPU 0 TRACE:  004742 0 005120015000 (CIOC 005120)

TRACE:  004742 0 005120015000 (CIOC 005120)
FINAL: Read ABS read  00005120 000000000000
FINAL: iom_core_read read  00001410 005122000000
FINAL: iom_core_read read  00001404 000000000000
FINAL: iom_core_read read  00001406 001404000000
FINAL: iom_core_read_l read  00001407 005160000000
FINAL: iom_core_write write 00005160 000002140013
FINAL: iom_core_write_ write 00001407 001404000000
FINAL: iom_core_read_l read  00001204 001204616000
FINAL: iom_core_write_ write 00001204 201204616000
IOM DEBUG: iom_list_service iom 0 chan 2 2.
IOM DEBUG: mbx_loc: IOM A, chan 2 is 000000001410
IOM DEBUG: lpw 005122000000
IOM DEBUG: fetch_and_parse_LPW: chan 2 res 0 18_rel 0 ae 0 nc 0 tal 0 23rel 0 dcw 05122 tally 0
iom_list_service
IOM DEBUG: iom_fault: chan 2 iom_list_service req 06 signal 013
IOM DEBUG: mbx_loc: IOM A, chan 1 is 000000001404
IOM DEBUG: iom_fault: lpw 000000000000 scw 001404000000 dcw 005160000000
IOM NOTIFY: send_general_interrupt: IOM A, channel 1 (01), level 0; Interrupt 4 (04).
IOM DEBUG: send_general_interrupt: IMW at 01204 was 001204616000; setting bit 1
IOM INFO: send_general_interrupt: IMW at 01204 now 201204616000
connect channel connect failed
IOM DEBUG: iom_interrupt: IOM A finished; do_connect_chan returned -1.

Faults in list service because NC == 0 and TAL == 0
DBG(68163242)> IOM DEBUG: iom_interrupt: IOM A starting. [68163242] 04000:00004742
IOM DEBUG: iom_list_service iom 0 chan 2 2.
IOM DEBUG: mbx_loc: IOM A, chan 2 is 000000001410
IOM DEBUG: lpw 005122040001

connect channel list service

IOM DEBUG: fetch_and_parse_LPW: chan 2 res 0 18_rel 0 ae 0 nc 1 tal 0 23rel 0 dcw 05122 tally 01

IOM DEBUG: fetch_and_parse_PCW: chan 8 pcw0 407700000201
IOM DEBUG: fetch_and_parse_PCW: chan 8 pcw0: dev_cmd 040 dev_code 077 ae 0 ec 0 control 0 chan_cmd 02 data 01
IOM DEBUG: fetch_and_parse_PCW: chan 8 pcw1: ae 0 ptp 0 pge 0 ptp 0

The DCW is for channel 8 (010).  This will be the OPCON for the test machine.
Command is 040: reset

IOM DEBUG: mbx_loc: IOM A, chan 2 is 000000001410
IOM DEBUG: write_LPW: chan 2 lpw 005122040001
IOM DEBUG: iom_cmd returnd 0
IOM DEBUG: iom_list_service iom 0 chan 10 8.
IOM DEBUG: mbx_loc: IOM A, chan 8 is 000000001440
IOM DEBUG: lpw 005126000000
IOM DEBUG: fetch_and_parse_LPW: chan 8 res 0 18_rel 0 ae 0 nc 0 tal 0 23rel 0 dcw 05126 tally 0
IOM DEBUG: fetch_and_parse_LPW: chan 8 bound 01441 size 0
IOM DEBUG: fetch_and_parse_DCW: chan 8 dcw 000000000000
IOM DEBUG: fetch_and_parse_DCW: chan 8 ddcw: address 0 char_pos 0 type 0 tally 0 
IOM DEBUG: mbx_loc: IOM A, chan 8 is 000000001440
IOM DEBUG: write_LPW: chan 8 lpwx 001441005126
do_payload_chan expected IDCW 8 (10), cmd was 32. 40o
IOM DEBUG: mbx_loc: IOM A, chan 8 is 000000001440
IOM DEBUG: SCW chan 8 005140000000
IOM DEBUG: status_service: Status tally 0 (0) lq 0
IOM DEBUG: status_service: Writing status for chan 8 dev_code 0 to 01442=>05140
IOM TRACE: Writing status for chan 8 dev_code 0 to 01442=>05140
IOM ALL: status_service: Status: 0450102200000 0000000040000
IOM NOTIFY: send_general_interrupt: IOM A, channel 8 (010), level 1; Interrupt 12 (014).
IOM DEBUG: send_general_interrupt: IMW at 01214 was 001214616000; setting bit 8
IOM INFO: send_general_interrupt: IMW at 01214 now 001214616000
IOM DEBUG: iom_interrupt: IOM A finished; do_connect_chan returned 0.

A successful reset of the OPCON. What about the 

do_payload_chan expected IDCW 8 (10), cmd was 32. 40o
The DCW was 0.

Some combination of bits in the LPW/PCW is telling the IOM not to fetch the DCW; the emulator is not recognizing it.
IOM DEBUG: fetch_and_parse_LPW: chan 2 res 0 18_rel 0 ae 0 nc 1 tal 0 23rel 0 dcw 05122 tally 01

 NC - No Change (LPW 21) - Provides the software with a way to control
          the updating of the LPW (both address and tally fields) as shown in
          Table 3.2.1. When set to a one, bit 21 inhibits the updating of the
          address and tally fields of the LPW. It forces a PTRO to be indicated
          for a Connect Channel service regardless of the state of LPW bit 22. (TAL)

Table 3.2.1, case c.  (NC== 1)
   TAL don't care
   Tally don't care
    Don't update address and tally
   Indicate PTRO to Connect Channel
   No PTRO fault

IOM DEBUG: fetch_and_parse_PCW: chan 8 pcw0 407700000201
IOM DEBUG: fetch_and_parse_PCW: chan 8 pcw0: dev_cmd 040 dev_code 077 ae 0 ec 0 control 0 chan_cmd 02 data 01

IOM DEBUG: fetch_and_parse_LPW: chan 8 res 0 18_rel 0 ae 0 nc 0 tal 0 23rel 0 dcw 05126 tally 0
IOM DEBUG: fetch_and_parse_LPW: chan 8 bound 01441 size 0
IOM DEBUG: fetch_and_parse_DCW: chan 8 dcw 000000000000
IOM DEBUG: fetch_and_parse_DCW: chan 8 ddcw: address 0 char_pos 0 type 0 tally 0
DBG(68163540)> IOM DEBUG: iom_interrupt: IOM A starting. [68163540] 04000:00004742

A reset to channel 9.

DBG(68163854)> IOM DEBUG: iom_interrupt: IOM A starting. [68163854] 04000:00004742

10 12 .. 63

Ahh, In block 16, the LPW tally is 1, in block 71, the tally is 0.
So in 16, the blank DCW is red and generates the fault.
In block 71, the tally of 0 prevents any I/O from happening, thus the test failure to detect the console.
In both cases NC is set, so tally should be ignored.

No, actually in 71, channel 8 is masked?

BCD strings in T&D tape:

BLK 1:

  PM01B  P.F.T. RECORD 1

2:

  PM01C  P.F.T. RECORD 1

3:

  PM01Z  P.F.T. RECORD 1

4:

  PM02A   P.F.T. RECORD 2

5:

  PM02B  P.F.T. RECORD 2

6:

  PM03A  P.F.T. RECORD 3

7:

PM03B  P.F.T. RECORD 3

8:

PM04A  P.F.T. RECORD 4

9:

PM04B  P.F.T. RECORD 4
PM04C

10:

PM04C  P.F.T. RECORD 4

11:

PM04D  P.F.T. RECORD 2

12:

PM04E  P.F.T. RECORD 2

13: 

PM04F   P.F.T. RECORD 2

14:

PM04G  P.F.T. RECORD 2

15:

PM060 END OF PRIMITIVE FUNCTION TEST. THE EXECUTIVE WILL BE READ INTO STORE

PM05B  PFT  5B

16:

PM061 END OF PRIMITIVE FUNCTION TEST. THE EXECUTIVE WILL BE READ INTO STORE
PM05C P.F.T. RECORD 5

17:

PM060  EXECUTIVE PROGRAM  PAS 6000 EXECUTIVE REV. ???MUB20B 87-02-16

18:

PROM DATA INDICATES FOLLOWING SYSTEM
BYTES 0-33
MODEL      SERIAL     DATE
BYTES 34-40
PROCESSOR 
BCD OPTIONS
DPS OPTIONS
8K CACHE
VM&S OPTIONS
CPL/NPL
PORT SPEED=FAST
OU  SPEED=FAST OU
HEXADECIMAL OPTION
RSCR  OPTION
BYTES 50
GCOS LOCKOUT BYTES
GCOS3
GCOS8
CP6
MULTIC
NOTE TEST PROM WILL CAUSE INVALID?!1RESULTS IF IT CONTAINS ONLY DATA
PATTERNS  EXAMPLE= 
UNDEFINED
ELS PROCESSOR
DPS PROCESSOR
6000,L66 OR DPS
RSW TEST
CHECK VISUALLY
DATA SWITCHES
CONFIGURATION SWITCHES
PORT A=0-8 PORT B=9-17 PORT C=18-26 PORT D=27-35
ADDRESS ASSIGNMENT = BITS 0-2, 9-11, 18-20, 27-29
PORT ENABLE = BITS 3,12,21,30

19:

INITIALIZE CONTROL = BITS 4,13,22,31
INTERLACE ENABLE = BITS 5,14,23,32
MEMORY SIZE = BITS 6-8, 15-17, 24-26, 33-35
MISCELLANEOUS SWITCHES =
PORT ADR. EXPANSION=0-3 FLT BASE=6-12 BAR MODE=17
PROCESSOR ID.=21-33 PROCESSOR NO.=34-35
THE ABOVE PROCESSOR IDENTIFICATION CODE FROM THE
MISCELLANEOUS SWITCHES(RSW 000002) INDICATES A
XXXXXXXXXXXXXXXXXX CPU IN OPERATION
CPU INSTALLED OPTIONS INCLUDE...
PRE-EIS 6000(655)
ODEL 6070  000[00      MODEL 6050  000#00      MODEL 6030  000@00      MODEL 6080  000>00      MODEL 6060  000?00      MODEL 6040  002?00      MODEL 6025  000 006070 IN 6100 CAB. 000B006050 IN 6100 CAB. 000C006030 IN 6100 CAB. 000D006080 IN 6100 CAB. 000F006060 IN 6100 CAB. 000G006040 IN 6100 CAB. 002G006025 IN 6100 CAB. 000H00      MODEL 6170  000&00      MODEL 6150  000.00      MODEL 6130  000]00      MODEL 6180  000<00      MODEL 6160  000\00      MODEL 6140  002\00      MODEL 6125  006?00      MODEL 66/10 004?00      MODEL 66/20 004@00      MODEL 66/40 005>00      MODEL 66/60 005@00      MODEL 66/80 024@00      MODEL 66/80 00N@00      MODEL 66/60P00N>00      MODEL 66/40P00M@00      MODEL 66/20P00M?00      MODEL 66/10P00O?00      MODEL 66/05P015@00      MODEL 66/27 015?00      MODEL 66/17 016?00      MODEL 66/07 00S?00      MODEL 6025N 00+?00      MODEL 6040N 00+@00      MODEL 6060N 00A>00      MODEL 6080N 00A@00      MODEL 608CN 02 @00      MODEL 608CN
SBER  MLDA  MLDQ  MLDAQ MSTA  MSTQ  MSTAQ SMBA  SMBB  LMBA  LMBB  LBER
ELS- /MODEL 820   844   847   849   CCAC  STO   LDO   DPS-8/46    70    52    62    00701E     MODEL L66/DPS03P\0003X\00002\00UNKNOWN TYPE
EXT. MEMORY-2K CACHE MEM8K CACCU OPTION - VU OPTPORT ADR EXP BCD OPTION-HEX OPTION- RSCR OPTION -NONE-002010BIT 1618,16 19,16 20,16 21,16 16 NOT23,16N24,16 25,16
STATUS ERROR ON PRINTER IMAGE BUFFER LOAD.  DO Y????0U!1WANT TO TRY AGAIN? ENTER Y OR N.
PLEASE READY PRINTER, THEN PUSH EOM TO CONTINUE.??? 2)T009!1POSITION PRT400 PAPER, THEN PUSH EOM TO CONTINUE.
STATUS ERROR ON PRINTER VFU IMAGE LOAD.  DO YOU WANT!1TO TRY AGAIN?(Y OR N)?
S MTS F/W ALREADY LOADED
ENTER BOOT TAPE DENSITY(556 800 OR 1600)
DO YOU WANT TO RUN I/O MONITOR(Y OR N)?
IS PRT F/W ALREADY LOADED
IS CRZ F/W ALREADY LOADED
PRIMITIVE SURVEY INDICATES NO PRINTER AVAILABLE.
DO YOU HAVE A URMPC WITH A PRINTER?(ENTER Y OR N)
DO YOU HAVE A PRT300?(RESPOND Y OR N)
ENTER UR PRINTER MODEL(PR2,U.PR2,PR3,PR4,U.PR4,PR5)
ENTER IOM/CHA  NO. AS I/CC
ENTER PRINT TRAIN IDENT NO.(1,2,...,9)
16-BIT(0) OR 9-BIT(1) CHARACTER IMAGE?(ENTER 0 OR 1)

20:

21:

UNEXPECTED ???????XXXXXXXXXXXX FAULT AT ??XXXXXX XXXXXXXX???!1??C(XXXXXX)= ???XXXXXXXXXXXX FAULT REG= XXXXXXXXXXXXILLEGAL PROCMEMORY??????FAULT TAG???DIVIDE CHECKOVERFLOW????LOCKUP??????DERAIL??????SHUTDOWN????MASTER MODE?TIMER RUNOUTCOMMAND?????CONNECT?????PARITY ERROROP NOT COMP?STARTUP?????EXECUTE

22:

EXTRANEOUS INTERRUPT FROM LOCATION
EXTRANEOUS MARKER INTERRUPT
EXTRANEOUS TERMINATE INTERRUPT
EXTRANEOUS OVERHEAD CHANNEL INTERRUPT
UNEXPECTED IOM FAULT AT XXXXXX ON IOM 
FAULT WORD WAS    XXXXXXXXXXXX

23:

UNSUCCESSFUL TAPE READ
STATUS;  MAJOR-?XX SUB-?XX CHA/IOM-?????XX CHA-
REPLY OK OR RETRY 
CANNOT RETRY TAPE READ WITHOUT FIRMWARE LOADED
****REWIND TAPE AND REBOOT SYSTEM.  GOOD LUCK.
TAPE ERROR ON ??XXX ??COMMAND.????!1CORRECT ERROR CONDITION AND !1PUSH EOM TO CONTINUE. 
1************************* XXXXXXXXXXXXXXXXXX **************************???XXXXX    TEST-?XXX    ??XXXXXXXXXXXX    BAR-????XXXXXX0

24:

DISK DCW BUFFER OVERFLOW. 
CHECKSUM S/B

25:

TOO MANY OPTIONS FOR OPTION SAVE AREA
OPTIONS!!?  ???!1IS IT A URMPC PRINTER?(Y OR N)

26:

TK0000Z
CPU PORT SIZE CONFIG. REG. SETTING FUNCTION 
E.O.M FOR BYPASS. ENTER LOWER PORT A OR B -
CPU   PORT SIZE - (0)=NONE (3)=256K OR LESS
4)=512K (5)=1MW (6)=2MW (7)=4MW    
ENTER LOWER AND UPPER SIZE - L,U
CPU CONFIG. REG. WAS CHANGED !1   ?TO ????000000 FROM 000000
BYPASSED CPU CONFIG. REG. SETTING
CANNOT SET CPU CONFIG. REG.
BASE ADDRESS CANNOT BE SPECIFIED FOR MASTER MODE PROGRAM

27:

NO RESTART ON MPC TAPES. INITIALIZE AND REBOOT
MDUMP SDUMP TDUMP XDUMP SNAP  4'_007PAS2        ******      DUMP NUMBER

28:

******       TEST ******000000  IC  ******  IND ******  BAR ******  AR  ************  QR  ************  ER  ***     X0  ******  X1  ******  X2  ******  X3  ******  X4  ******  X5  ******  X6  ******  X7  ******ABSOLUTE MEMORY   RELOCATABLE MEMORY0000004+$003******???   ******???   ************????  ************????  ************????  ************????  ************????  ************????  ************????  ************??????               ???                        LOCATIONS?? ****** THROUGH??? ****** ALL CONTAIN????? ************
IRECTORY AND CACHE STORAGE DUMP    ABSOL????UTE FULL/ 
CACHE STORA????GE 
DIRECTORY(P= PA????RITY ERROR) 
 ADDRE????SS  EMPTY 
(P= PARITY E????RROR)   
COL LVL?
MODE REG(36-71)
DUPLICATE DIRECTORY ERROR
BACKING STORE NOT EQUAL TO CACHE.
EXECUTED CORRECTLY  > = TESTED AND FOUND IN ERROR NO SYMBOL = NOT TESTED  INVAL = INVALID OP CODE OR MODIFICATION

29:

TAPE FORMAT PROBLEM, CAN'T FIND $ OBJECT CARD
CANNOT FIND $ DKEND IN FINAL RECORD.  
LOADED FROM TAPE  ZZZZZZ
ENTER START?? TO BEGIN EXECUTION
CANNOT RECOGNIZE CARD FORMAT

30:

ENTER SOURCE TAPE DEVICE NUMBER (DD)
INCORRECT FORMAT. RETYPE IT
ILLEGAL PAYLOAD CHANNEL-IOM.
CHECKSUM ERROR. REPLY OK OR RETRY-!1LOAD ADDRESS
OUT-OF-BOUNDS. LOADING REQUEST TERMINATE
BCD CARD CANNOT BE IDENTIFIED. CARD IGNORED
IS THIS A URMPC CARD READER?(ENTER Y OR N)
MODE OPTION OP CODE TRAP OCCURRED AT ???
MODE OPTION CU-HR CNTR. OVFL. OCCURRED AT
MODE OPTION ADDRESS MATCH TRAP OCCURRED AT ???
COULD NOT SET ALL CACHE MODE REGISTER PROGRAM-??

31: 

INCLUDE CPU VOLTAGE MARGINING, SET THE SWITCH TO

32:

history registers

33:

history registers

34:

history regsiters

35:

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