CAC 2017-05-04

tst863

pa863    test-02     basic/append    bar-100176
***dsbr***  addr= 00100000 bnd= 37777 u= 1 stack= 0000
test start 104770   patch 103507   subtest loop point 103516

executing instructions in append with bit 29 on

location 105104  700005710300   instruction is   tra
location 105105  100014235300   instruction is   lda

prime results    ar1    snr1 rnr1    ar7    snr7 rnr7       a
          s/b 00000000 02506  0   00000000 02505  0   632562630002
          was 00000000 02506  0   00000000 02505  0   632562630002
          ic
    s/b 000006
    was 000006

function in error -
executing lda with bit 29 on
descriptor segment table - non paged
segment - non paged

hint -

>>>>>>>>>  am.sdw pointer error  <<<<<<<<<

>>>>>>>>>   suspect cpu overlap is inhibited by switches   <<<<<<<<<
>>>>>>>>>   will not test any more assoc memory pointers   <<<<<<<<<

***********
*** sdw ***
***********

address  r1 r2 r3 f fc bound r e w p u g x  cl
00105105 0  0  0  1 0  37777 1 1 1 1 1 1 0 00000
00105234 0  0  0  1 0  37777 1 1 1 1 1 1 0 00000

>>> sdw assoc mem "s/b" data <<<
>>> zeros indicate not used <<<

-------------------------sdw associative memory-------------------------

  seg-pntr  f    lru   sdw-addr  r1  r2  r3  seg-bnd  rewpugc   cl   par

[00] 02505  1     16   00105105   0   0   0   37777   000111   00000
[01] 02506  1     17   00105234   0   0   0   37777   000111   00000
[02] 00000  0     00   00000000   0   0   0   00000   000000   00000
[03] 00000  0     00   00000000   0   0   0   00000   000000   00000
[04] 00000  0     00   00000000   0   0   0   00000   000000   00000
[05] 00000  0     00   00000000   0   0   0   00000   000000   00000
[06] 00000  0     00   00000000   0   0   0   00000   000000   00000
[07] 00000  0     00   00000000   0   0   0   00000   000000   00000
[08] 00000  0     00   00000000   0   0   0   00000   000000   00000
[09] 00000  0     00   00000000   0   0   0   00000   000000   00000
[10] 00000  0     00   00000000   0   0   0   00000   000000   00000
[11] 00000  0     00   00000000   0   0   0   00000   000000   00000
[12] 00000  0     00   00000000   0   0   0   00000   000000   00000
[13] 00000  0     00   00000000   0   0   0   00000   000000   00000
[14] 00000  0     00   00000000   0   0   0   00000   000000   00000
[15] 00000  0     00   00000000   0   0   0   00000   000000   00000
[00] 00000  0     00   00000000   0   0   0   00000   000000   00000
[01] 00000  0     00   00000000   0   0   0   00000   000000   00000
[02] 00000  0     00   00000000   0   0   0   00000   000000   00000
[03] 00000  0     00   00000000   0   0   0   00000   000000   00000
[04] 00000  0     00   00000000   0   0   0   00000   000000   00000
[05] 00000  0     00   00000000   0   0   0   00000   000000   00000
[06] 00000  0     00   00000000   0   0   0   00000   000000   00000

It appears that the rewpugc bits are wrong…

the instructions:

DBG(81264123)> CPU TRACE: 1: 105104 700005710300 (TRA PR7|5) 000005 710(0) 1 1 0 00^M
DBG(81264123)> CPU CORE: core_read2 20105212 001051050004 (fetchNSDW)^M
DBG(81264123)> CPU CORE: core_read2 20105213 377777700000 (fetchNSDW)^M
DBG(81264123)> CPU CORE: core_read  20105105 100014235300 (OPERAND_READ)^M
DBG(81264123)> CPU TRACE: ReadTraOp 02505:000005^M
DBG(81264124)> CPU CORE: core_read  20105105 100014235300 (INSTRUCTION_FETCH)^M
DBG(81264125)> CPU TRACE: 1: 02505:000005 0 100014235300 (LDA PR1|14) 000014 235(0) 1 1 0 00^M
DBG(81264125)> CPU CORE: core_read2 20105214 001052340004 (fetchNSDW)^M
DBG(81264125)> CPU CORE: core_read2 20105215 377777700000 (fetchNSDW)^M
DBG(81264125)> CPU CORE: core_read  20105234 632562630002 (OPERAND_READ)^M

sdw used by TRA

001051050004 377777700000

addr 00105105
r1 0
r2 0
r3 0
sbz: 4

bound  37777

rew 7
pug 7
c 0 
cl 00000

that matches the S/B.

SIMH>ex 020105212
20105212:    001051050004
SIMH>ex 020105213
20105213:    377777700000
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