CAC 2016-02-25

ISOLTS

create_cpu_test_env:
     entry (cpu_tag, scu_tag, switches, wseg_p, code);

          code = 0;                                         /* preset return code */
          wseg_p = null;                                    /* set work seg ptr to null initially */

          if scs$reconfig_lock ^= pds$processid then do;    /* not locked to us */
               code = rcerr_isolts_not;
               return;
          end;
          scs$processor_test_data.cpu_tag = cpu_tag;        /* initialize  processor_test_data structure */
          scs$processor_test_data.scu_tag = scu_tag;
          scs$processor_test_data.scu_state = "00"b;
          scs$processor_test_data.active = "1"b;            /* set active flag */

          call configure_test_cpu (tcode);                  /* go do the work */

DBG(389312393)> CPU0 TRACE: 00132:001352 bound_hc_reconfig:reconfig+01352
DBG(389312393)> CPU0 TRACE:       647 create_cpu_test_env:
DBG(389312393)> CPU0 TRACE: 00132:001352 0 000360627000 (EAX7 000360) 000360 627(0) 0 0 0 00
DBG(389312395)> CPU0 TRACE: 00132:001353 0 700034352120 (EPP2 PR7|34,N*) 700034 352(0) 1 0 1 00
DBG(389312397)> CPU0 TRACE: 00132:001354 0 201045272100 (TSP2 PR2|1045) 201045 272(0) 1 0 0 00
DBG(389312441)> CPU0 TRACE: 00132:001357 0 600032373520 (EPP7 PR6|32,N*) 600032 373(1) 1 0 1 00
DBG(389312443)> CPU0 TRACE: 00132:001360 0 700006371520 (EPP5 PR7|6,N*) 700006 371(1) 1 0 1 00
DBG(389312445)> CPU0 TRACE: 00132:001361 0 600126651500 (SPRI5 PR6|126) 600126 651(1) 1 0 0 00
DBG(389312447)> CPU0 TRACE: 00132:001362 0 700012353520 (EPP3 PR7|12,N*) 700012 353(1) 1 0 1 00
DBG(389312449)> CPU0 TRACE: 00132:001363 0 600130253500 (SPRI3 PR6|130) 600130 253(1) 1 0 0 00

DBG(389312451)> CPU0 TRACE:       650   code = 0;                                       /* preset return code */
DBG(389312451)> CPU0 TRACE: 00132:001364 0 600130450120 (STZ PR6|130,N*) 600130 450(0) 1 0 1 00

DBG(389312453)> CPU0 TRACE:       651   wseg_p = null;                          /* set work seg ptr to null initially */
DBG(389312453)> CPU0 TRACE: 00132:001365 0 776443237004 (LDAQ 776443,IC) 776443 237(0) 0 0 0 04
DBG(389312455)> CPU0 TRACE: 00132:001366 0 600032373520 (EPP7 PR6|32,N*) 600032 373(1) 1 0 1 00
DBG(389312457)> CPU0 TRACE: 00132:001367 0 700010757120 (STAQ PR7|10,N*) 700010 757(0) 1 0 1 00

DBG(389312459)> CPU0 TRACE:       653   if scs$reconfig_lock ^= pds$processid then do;  /* not locked to us */
DBG(389312459)> CPU0 TRACE: 00132:001370 0 600044370120 (EPP4 PR6|44,N*) 600044 370(0) 1 0 1 00
DBG(389312461)> CPU0 TRACE: 00132:001371 0 400026235120 (LDA PR4|26,N*) 400026 235(0) 1 0 1 00
DBG(389312463)> CPU0 TRACE: 00132:001372 0 400030115120 (CMPA PR4|30,N*) 400030 115(0) 1 0 1 00
DBG(389312465)> CPU0 TRACE: 00132:001373 0 000004600004 (TZE 000004,IC) 000004 600(0) 0 0 0 04

DBG(389312467)> CPU0 TRACE: 00132:001377 bound_hc_reconfig:reconfig+01377
DBG(389312467)> CPU0 TRACE:       657   scs$processor_test_data.cpu_tag = cpu_tag;      /* initialize  processor_test_data structure */
DBG(389312467)> CPU0 TRACE: 00132:001377 0 700002236120 (LDQ PR7|2,N*) 700002 236(0) 1 0 1 00
DBG(389312469)> CPU0 TRACE: 00132:001400 0 000060737000 (LLS 000060) 000060 737(0) 0 0 0 00
DBG(389312471)> CPU0 TRACE: 00132:001401 0 400040371520 (EPP5 PR4|40,N*) 400040 371(1) 1 0 1 00
DBG(389312473)> CPU0 TRACE: 00132:001402 0 500000751104 (STCA PR5|0,IC) 500000 751(0) 1 0 0 04

DBG(389312475)> CPU0 TRACE:       658   scs$processor_test_data.scu_tag = scu_tag;
DBG(389312475)> CPU0 TRACE: 00132:001403 0 700004236120 (LDQ PR7|4,N*) 700004 236(0) 1 0 1 00
DBG(389312477)> CPU0 TRACE: 00132:001404 0 000052737000 (LLS 000052) 000052 737(0) 0 0 0 00
DBG(389312479)> CPU0 TRACE: 00132:001405 0 400040371520 (EPP5 PR4|40,N*) 400040 371(1) 1 0 1 00
DBG(389312481)> CPU0 TRACE: 00132:001406 0 500000751102 (STCA PR5|0,QU) 500000 751(0) 1 0 0 02

DBG(389312483)> CPU0 TRACE:       659   scs$processor_test_data.scu_state = "00"b;
DBG(389312483)> CPU0 TRACE: 00132:001407 0 000751235004 (LDA 000751,IC) 000751 235(0) 0 0 0 04
DBG(389312485)> CPU0 TRACE: 00132:001410 0 400040355120 (ANSA PR4|40,N*) 400040 355(0) 1 0 1 00

DBG(389312487)> CPU0 TRACE:       660   scs$processor_test_data.active = "1"b;          /* set active flag */
DBG(389312487)> CPU0 TRACE: 00132:001411 0 400000235003 (LDA 400000,DU) 400000 235(0) 0 0 0 03
DBG(389312489)> CPU0 TRACE: 00132:001412 0 400040255120 (ORSA PR4|40,N*) 400040 255(0) 1 0 1 00

DBG(389312491)> CPU0 TRACE:       662   call configure_test_cpu (tcode);                /* go do the work */
DBG(389312491)> CPU0 TRACE: 00132:001413 0 600100352100 (EPP2 PR6|100) 600100 352(0) 1 0 0 00
DBG(389312493)> CPU0 TRACE: 00132:001414 0 600210252100 (SPRI2 PR6|210) 600210 252(0) 1 0 0 00
DBG(389312495)> CPU0 TRACE: 00132:001415 0 600206621100 (EAX1 PR6|206) 600206 621(0) 1 0 0 00
DBG(389312497)> CPU0 TRACE: 00132:001416 0 004000431007 (FLD 004000,DL) 004000 431(0) 0 0 0 07
DBG(389312499)> CPU0 TRACE: 00132:001417 0 007212352000 (EPP2 007212) 007212 352(0) 0 0 0 00
DBG(389312501)> CPU0 TRACE: 00132:001420 0 000623700100 (TSX0 PR0|623) 000623 700(0) 1 0 0 00

configure_test_cpu: proc (rcode);
          if scs$reconfig_lock ^= pds$processid | ^scs$processor_test_data.active then do; /* if not ISOLTS process */
               rcode = rcerr_isolts_not;                    /* return error code */
               return;
          end;
          else rcode = 0;                                   /* otherwise return 0 */
          reconfig_err = "0"b;                              /* reset reconfiguration error flag */

          iscu = scs$processor_test_data.scu_tag;           /* copy scu and cpu tags */
          icpu = scs$processor_test_data.cpu_tag;
          cdp = addr (scs$controller_data (iscu));          /* Get ptr to data for this SCU. */

DBG(389312521)> CPU0 TRACE:        32 configure_test_cpu: proc (rcode);
DBG(389312521)> CPU0 TRACE: 00132:007212 0 000400627000 (EAX7 000400) 000400 627(0) 0 0 0 00
DBG(389312523)> CPU0 TRACE: 00132:007213 0 700034352120 (EPP2 PR7|34,N*) 700034 352(0) 1 0 1 00
DBG(389312525)> CPU0 TRACE: 00132:007214 0 201045272100 (TSP2 PR2|1045) 201045 272(0) 1 0 0 00

DBG(389312569)> CPU0 TRACE:       118   if scs$reconfig_lock ^= pds$processid | ^scs$processor_test_data.active then do; /* if not ISOLTS process */
DBG(389312569)> CPU0 TRACE: 00132:007217 0 400026235120 (LDA PR4|26,N*) 400026 235(0) 1 0 1 00
DBG(389312571)> CPU0 TRACE: 00132:007220 0 400030115120 (CMPA PR4|30,N*) 400030 115(0) 1 0 1 00
DBG(389312573)> CPU0 TRACE: 00132:007221 0 000004601004 (TNZ 000004,IC) 000004 601(0) 0 0 0 04
DBG(389312575)> CPU0 TRACE: 00132:007222 0 400040235120 (LDA PR4|40,N*) 400040 235(0) 1 0 1 00
DBG(389312577)> CPU0 TRACE: 00132:007223 0 400000315003 (CANA 400000,DU) 400000 315(0) 0 0 0 03
DBG(389312579)> CPU0 TRACE: 00132:007224 0 000005601004 (TNZ 000005,IC) 000005 601(0) 0 0 0 04

DBG(389312581)> CPU0 TRACE:       122   else rcode = 0;                         /* otherwise return 0 */
DBG(389312581)> CPU0 TRACE: 00132:007231 0 600032373520 (EPP7 PR6|32,N*) 600032 373(1) 1 0 1 00
DBG(389312583)> CPU0 TRACE: 00132:007232 0 700002450120 (STZ PR7|2,N*) 700002 450(0) 1 0 1 00

DBG(389312585)> CPU0 TRACE:       123   reconfig_err = "0"b;                    /* reset reconfiguration error flag */
DBG(389312585)> CPU0 TRACE: 00132:007233 0 600142450100 (STZ PR6|142) 600142 450(0) 1 0 0 00

DBG(389312587)> CPU0 TRACE:       125   iscu = scs$processor_test_data.scu_tag;         /* copy scu and cpu tags */
DBG(389312587)> CPU0 TRACE: 00132:007234 0 400040235120 (LDA PR4|40,N*) 400040 235(0) 1 0 1 00
DBG(389312589)> CPU0 TRACE: 00132:007235 0 000030735000 (ALS 000030) 000030 735(0) 0 0 0 00
DBG(389312591)> CPU0 TRACE: 00132:007236 0 000102733000 (LRS 000102) 000102 733(0) 0 0 0 00
DBG(389312593)> CPU0 TRACE: 00132:007237 0 600101756100 (STQ PR6|101) 600101 756(0) 1 0 0 00

DBG(389312595)> CPU0 TRACE:       126   icpu = scs$processor_test_data.cpu_tag;
DBG(389312595)> CPU0 TRACE: 00132:007240 0 400040235120 (LDA PR4|40,N*) 400040 235(0) 1 0 1 00
DBG(389312597)> CPU0 TRACE: 00132:007241 0 000022735000 (ALS 000022) 000022 735(0) 0 0 0 00
DBG(389312599)> CPU0 TRACE: 00132:007242 0 000102733000 (LRS 000102) 000102 733(0) 0 0 0 00
DBG(389312601)> CPU0 TRACE: 00132:007243 0 600100756100 (STQ PR6|100) 600100 756(0) 1 0 0 00

DBG(389312603)> CPU0 TRACE:       127   cdp = addr (scs$controller_data (iscu));        /* Get ptr to data for this SCU. */
DBG(389312603)> CPU0 TRACE: 00132:007244 0 600101236100 (LDQ PR6|101) 600101 236(0) 1 0 0 00
DBG(389312605)> CPU0 TRACE: 00132:007245 0 000002736000 (QLS 000002) 000002 736(0) 0 0 0 00
DBG(389312607)> CPU0 TRACE: 00132:007246 0 400016371566 (EPP5 PR4|16,*QL) 400016 371(1) 1 0 3 06
DBG(389312609)> CPU0 TRACE: 00132:007247 0 600104651500 (SPRI5 PR6|104) 600104 651(1) 1 0 0 00

/* set up our read_switch template */

          isolts_switch_template, isolts_switch_mask = "0"b;/* clear them first */
          rswp = addr (isolts_switch_template (2));         /* set up rsw 2 first */
          switchp = addr (isolts_switch_mask (2));
          dps_rsw_2.fault_base = "0000010"b;                /* set up expected fault base */
          switchp -> dps_rsw_2.fault_base = "1111111"b;     /* set up fault base mask */
          dps_rsw_2.cpu_num = icpu;                         /* set up expected cpu tag */
          switchp -> dps_rsw_2.cpu_num = 7;                 /* set up cpu tag mask */
          if iscu < 4 then do;                              /* pick rsw 1 if scu tags A, B, C, or D */
               i = 1;
               j = iscu;
               switchp -> dps8_rsw_2.interlace_info (iscu) = "1"b; /* check possible interlace onf dps8 cpu */
          end;
          else do;                                          /* pick rsw 3 if scu tags E, F, G, or H */
               i = 3;
               j = iscu - 4;
          end;
          rswp = addr (isolts_switch_template (i));         /* set up rsw 1 - 3 data */
          pip = addr (rsw_1_3.port_info (j));               /* set template first */
          pi.port_enable = "1"b;                            /* port enable bit must be on */
          rswp = addr (isolts_switch_mask (i));             /* set up mask for expected port info */
          pip = addr (rsw_1_3.port_info (j));
          pi.port_assignment = "7"b3;
          pi.initialize_enable = "1"b;
          pi.interlace_enable = "1"b;
          rswp = addr (isolts_switch_mask (4));             /* set rsw 4 mask */
          rsw_4.port_info (iscu).four = "1"b;
          rsw_4.port_info (iscu).half = "1"b;
          scs$processor_switch_data, scs$processor_switch_compare = "0"b; /* clear out switch data */
          switchp = addr (scs$processor_switch_compare (1));/* set pointer */

DBG(389312611)> CPU0 TRACE:       131   isolts_switch_template, isolts_switch_mask = "0"b;/* clear them first */
DBG(389312611)> CPU0 TRACE: 00132:007250 0 000001236007 (LDQ 000001,DL) 000001 236(0) 0 0 0 07
DBG(389312613)> CPU0 TRACE: 00132:007251 0 600224756100 (STQ PR6|224) 600224 756(0) 1 0 0 00
DBG(389312615)> CPU0 TRACE: 00132:007252 0 600224727100 (LXL7 PR6|224) 600224 727(0) 1 0 0 00
DBG(389312617)> CPU0 TRACE: 00132:007253 0 600164450117 (STZ PR6|164,7) 600164 450(0) 1 0 0 17
DBG(389312619)> CPU0 TRACE: 00132:007254 0 600224236100 (LDQ PR6|224) 600224 236(0) 1 0 0 00
DBG(389312621)> CPU0 TRACE: 00132:007255 0 600224054100 (AOS PR6|224) 600224 054(0) 1 0 0 00
DBG(389312623)> CPU0 TRACE: 00132:007256 0 000005116007 (CMPQ 000005,DL) 000005 116(0) 0 0 0 07
DBG(389312625)> CPU0 TRACE: 00132:007257 0 777773604004 (TMI 777773,IC) 777773 604(0) 0 0 0 04
DBG(389312627)> CPU0 TRACE: 00132:007252 0 600224727100 (LXL7 PR6|224) 600224 727(0) 1 0 0 00
DBG(389312629)> CPU0 TRACE: 00132:007253 0 600164450117 (STZ PR6|164,7) 600164 450(0) 1 0 0 17
DBG(389312631)> CPU0 TRACE: 00132:007254 0 600224236100 (LDQ PR6|224) 600224 236(0) 1 0 0 00
DBG(389312633)> CPU0 TRACE: 00132:007255 0 600224054100 (AOS PR6|224) 600224 054(0) 1 0 0 00
DBG(389312635)> CPU0 TRACE: 00132:007256 0 000005116007 (CMPQ 000005,DL) 000005 116(0) 0 0 0 07
DBG(389312637)> CPU0 TRACE: 00132:007257 0 777773604004 (TMI 777773,IC) 777773 604(0) 0 0 0 04
DBG(389312639)> CPU0 TRACE: 00132:007252 0 600224727100 (LXL7 PR6|224) 600224 727(0) 1 0 0 00
DBG(389312641)> CPU0 TRACE: 00132:007253 0 600164450117 (STZ PR6|164,7) 600164 450(0) 1 0 0 17
DBG(389312643)> CPU0 TRACE: 00132:007254 0 600224236100 (LDQ PR6|224) 600224 236(0) 1 0 0 00
DBG(389312645)> CPU0 TRACE: 00132:007255 0 600224054100 (AOS PR6|224) 600224 054(0) 1 0 0 00
DBG(389312647)> CPU0 TRACE: 00132:007256 0 000005116007 (CMPQ 000005,DL) 000005 116(0) 0 0 0 07
DBG(389312649)> CPU0 TRACE: 00132:007257 0 777773604004 (TMI 777773,IC) 777773 604(0) 0 0 0 04
DBG(389312651)> CPU0 TRACE: 00132:007252 0 600224727100 (LXL7 PR6|224) 600224 727(0) 1 0 0 00
DBG(389312653)> CPU0 TRACE: 00132:007253 0 600164450117 (STZ PR6|164,7) 600164 450(0) 1 0 0 17
DBG(389312655)> CPU0 TRACE: 00132:007254 0 600224236100 (LDQ PR6|224) 600224 236(0) 1 0 0 00
DBG(389312657)> CPU0 TRACE: 00132:007255 0 600224054100 (AOS PR6|224) 600224 054(0) 1 0 0 00
DBG(389312659)> CPU0 TRACE: 00132:007256 0 000005116007 (CMPQ 000005,DL) 000005 116(0) 0 0 0 07
DBG(389312661)> CPU0 TRACE: 00132:007257 0 777773604004 (TMI 777773,IC) 777773 604(0) 0 0 0 04
DBG(389312663)> CPU0 TRACE: 00132:007252 0 600224727100 (LXL7 PR6|224) 600224 727(0) 1 0 0 00
...
DBG(389312735)> CPU0 TRACE: 00132:007266 0 000005116007 (CMPQ 000005,DL) 000005 116(0) 0 0 0 07
DBG(389312737)> CPU0 TRACE: 00132:007267 0 777773604004 (TMI 777773,IC) 777773 604(0) 0 0 0 04

DBG(389312739)> CPU0 TRACE:       132   rswp = addr (isolts_switch_template (2));       /* set up rsw 2 first */
DBG(389312739)> CPU0 TRACE: 00132:007270 0 600167373500 (EPP7 PR6|167) 600167 373(1) 1 0 0 00
DBG(389312741)> CPU0 TRACE: 00132:007271 0 600220653500 (SPRI7 PR6|220) 600220 653(1) 1 0 0 00

DBG(389312743)> CPU0 TRACE:       133   switchp = addr (isolts_switch_mask (2));
DBG(389312743)> CPU0 TRACE: 00132:007272 0 600162371500 (EPP5 PR6|162) 600162 371(1) 1 0 0 00
DBG(389312745)> CPU0 TRACE: 00132:007273 0 600136651500 (SPRI5 PR6|136) 600136 651(1) 1 0 0 00

DBG(389312747)> CPU0 TRACE:       134   dps_rsw_2.fault_base = "0000010"b;              /* set up expected fault base */
DBG(389312747)> CPU0 TRACE: 00132:007274 0 000100235003 (LDA 000100,DU) 000100 235(0) 0 0 0 03
DBG(389312749)> CPU0 TRACE: 00132:007275 0 700000675100 (ERA PR7|0) 700000 675(0) 1 0 0 00
DBG(389312751)> CPU0 TRACE: 00132:007276 0 007740375003 (ANA 007740,DU) 007740 375(0) 0 0 0 03
DBG(389312753)> CPU0 TRACE: 00132:007277 0 700000655100 (ERSA PR7|0) 700000 655(0) 1 0 0 00

DBG(389312755)> CPU0 TRACE:       135   switchp -> dps_rsw_2.fault_base = "1111111"b;   /* set up fault base mask */
DBG(389312755)> CPU0 TRACE: 00132:007300 0 007740235003 (LDA 007740,DU) 007740 235(0) 0 0 0 03
DBG(389312757)> CPU0 TRACE: 00132:007301 0 500000255100 (ORSA PR5|0) 500000 255(0) 1 0 0 00

DBG(389312759)> CPU0 TRACE:       136   dps_rsw_2.cpu_num = icpu;                       /* set up expected cpu tag */
DBG(389312759)> CPU0 TRACE: 00132:007302 0 600100236100 (LDQ PR6|100) 600100 236(0) 1 0 0 00
DBG(389312761)> CPU0 TRACE: 00132:007303 0 700000676100 (ERQ PR7|0) 700000 676(0) 1 0 0 00
DBG(389312763)> CPU0 TRACE: 00132:007304 0 000007376007 (ANQ 000007,DL) 000007 376(0) 0 0 0 07
DBG(389312765)> CPU0 TRACE: 00132:007305 0 700000656100 (ERSQ PR7|0) 700000 656(0) 1 0 0 00

DBG(389312767)> CPU0 TRACE:       137   switchp -> dps_rsw_2.cpu_num = 7;               /* set up cpu tag mask */
DBG(389312767)> CPU0 TRACE: 00132:007306 0 000007235007 (LDA 000007,DL) 000007 235(0) 0 0 0 07
DBG(389312769)> CPU0 TRACE: 00132:007307 0 500000675100 (ERA PR5|0) 500000 675(0) 1 0 0 00
DBG(389312771)> CPU0 TRACE: 00132:007310 0 000007375007 (ANA 000007,DL) 000007 375(0) 0 0 0 07
DBG(389312773)> CPU0 TRACE: 00132:007311 0 500000655100 (ERSA PR5|0) 500000 655(0) 1 0 0 00

DBG(389312775)> CPU0 TRACE:       138   if iscu < 4 then do;                    /* pick rsw 1 if scu tags A, B, C, or D */
DBG(389312775)> CPU0 TRACE: 00132:007312 0 600101236100 (LDQ PR6|101) 600101 236(0) 1 0 0 00
DBG(389312777)> CPU0 TRACE: 00132:007313 0 000004116007 (CMPQ 000004,DL) 000004 116(0) 0 0 0 07
DBG(389312779)> CPU0 TRACE: 00132:007314 0 000011605004 (TPL 000011,IC) 000011 605(0) 0 0 0 04

DBG(389312781)> CPU0 TRACE:       139        i = 1;
DBG(389312781)> CPU0 TRACE: 00132:007315 0 000001236007 (LDQ 000001,DL) 000001 236(0) 0 0 0 07
DBG(389312783)> CPU0 TRACE: 00132:007316 0 600126756100 (STQ PR6|126) 600126 756(0) 1 0 0 00

DBG(389312785)> CPU0 TRACE:       140        j = iscu;
DBG(389312785)> CPU0 TRACE: 00132:007317 0 600101236100 (LDQ PR6|101) 600101 236(0) 1 0 0 00
DBG(389312787)> CPU0 TRACE: 00132:007320 0 600127756100 (STQ PR6|127) 600127 756(0) 1 0 0 00

DBG(389312789)> CPU0 TRACE:       141        switchp -> dps8_rsw_2.interlace_info (iscu) = "1"b; /* check possible interlace onf dps8 cpu */
DBG(389312789)> CPU0 TRACE: 00132:007321 0 403106060400 (CSL 403106) 403106 060(1) 0 0 0 00

DBG(389312791)> CPU0 TRACE:       142   end;
DBG(389312791)> CPU0 TRACE: 00132:007324 0 000006710004 (TRA 000006,IC) 000006 710(0) 0 0 0 04

DBG(389312793)> CPU0 TRACE:       147   rswp = addr (isolts_switch_template (i));       /* set up rsw 1 - 3 data */
DBG(389312793)> CPU0 TRACE: 00132:007332 0 600126726100 (LXL6 PR6|126) 600126 726(0) 1 0 0 00
DBG(389312795)> CPU0 TRACE: 00132:007333 0 600165353516 (EPP3 PR6|165,6) 600165 353(1) 1 0 0 16
DBG(389312797)> CPU0 TRACE: 00132:007334 0 600220253500 (SPRI3 PR6|220) 600220 253(1) 1 0 0 00

DBG(389312799)> CPU0 TRACE:       148   pip = addr (rsw_1_3.port_info (j));             /* set template first */
DBG(389312799)> CPU0 TRACE: 00132:007335 0 000011402007 (MPY 000011,DL) 000011 402(0) 0 0 0 07
DBG(389312801)> CPU0 TRACE: 00132:007336 0 300000352100 (EPP2 PR3|0) 300000 352(0) 1 0 0 00
DBG(389312803)> CPU0 TRACE: 00132:007337 0 200000503506 (ABD PR2|0,QL) 200000 503(1) 0 0 0 06
DBG(389312805)> CPU0 TRACE: 00132:007340 0 600134252100 (SPRI2 PR6|134) 600134 252(0) 1 0 0 00

DBG(389312807)> CPU0 TRACE:       149   pi.port_enable = "1"b;                  /* port enable bit must be on */
DBG(389312807)> CPU0 TRACE: 00132:007341 0 403100060400 (CSL 403100) 403100 060(1) 0 0 0 00

DBG(389312809)> CPU0 TRACE:       150   rswp = addr (isolts_switch_mask (i));           /* set up mask for expected port info */
DBG(389312809)> CPU0 TRACE: 00132:007344 0 600160373516 (EPP7 PR6|160,6) 600160 373(1) 1 0 0 16
DBG(389312811)> CPU0 TRACE: 00132:007345 0 600220653500 (SPRI7 PR6|220) 600220 653(1) 1 0 0 00

DBG(389312813)> CPU0 TRACE:       151   pip = addr (rsw_1_3.port_info (j));
DBG(389312813)> CPU0 TRACE: 00132:007346 0 700000352100 (EPP2 PR7|0) 700000 352(0) 1 0 0 00
DBG(389312815)> CPU0 TRACE: 00132:007347 0 200000503506 (ABD PR2|0,QL) 200000 503(1) 0 0 0 06
DBG(389312817)> CPU0 TRACE: 00132:007350 0 600134252100 (SPRI2 PR6|134) 600134 252(0) 1 0 0 00

DBG(389312819)> CPU0 TRACE:       152   pi.port_assignment = "7"b3;
DBG(389312819)> CPU0 TRACE: 00132:007351 0 403100060400 (CSL 403100) 403100 060(1) 0 0 0 00

DBG(389312821)> CPU0 TRACE:       153   pi.initialize_enable = "1"b;
DBG(389312821)> CPU0 TRACE: 00132:007354 0 403100060400 (CSL 403100) 403100 060(1) 0 0 0 00

DBG(389312823)> CPU0 TRACE:       154   pi.interlace_enable = "1"b;
DBG(389312823)> CPU0 TRACE: 00132:007357 0 403100060400 (CSL 403100) 403100 060(1) 0 0 0 00

DBG(389312825)> CPU0 TRACE:       155   rswp = addr (isolts_switch_mask (4));           /* set rsw 4 mask */
DBG(389312825)> CPU0 TRACE: 00132:007362 0 600164353500 (EPP3 PR6|164) 600164 353(1) 1 0 0 00
DBG(389312827)> CPU0 TRACE: 00132:007363 0 600220253500 (SPRI3 PR6|220) 600220 253(1) 1 0 0 00

DBG(389312829)> CPU0 TRACE:       156   rsw_4.port_info (iscu).four = "1"b;
DBG(389312829)> CPU0 TRACE: 00132:007364 0 600101236100 (LDQ PR6|101) 600101 236(0) 1 0 0 00
DBG(389312831)> CPU0 TRACE: 00132:007365 0 000001736000 (QLS 000001) 000001 736(0) 0 0 0 00
DBG(389312833)> CPU0 TRACE: 00132:007366 0 403106060400 (CSL 403106) 403106 060(1) 0 0 0 00

DBG(389312835)> CPU0 TRACE:       157   rsw_4.port_info (iscu).half = "1"b;
DBG(389312835)> CPU0 TRACE: 00132:007371 0 403106060400 (CSL 403106) 403106 060(1) 0 0 0 00

DBG(389312837)> CPU0 TRACE:       158   scs$processor_switch_data, scs$processor_switch_compare = "0"b; /* clear out switch data */
DBG(389312837)> CPU0 TRACE: 00132:007374 0 000001236007 (LDQ 000001,DL) 000001 236(0) 0 0 0 07
DBG(389312839)> CPU0 TRACE: 00132:007375 0 600224756100 (STQ PR6|224) 600224 756(0) 1 0 0 00
DBG(389312841)> CPU0 TRACE: 00132:007376 0 600224727100 (LXL7 PR6|224) 600224 727(0) 1 0 0 00
DBG(389312843)> CPU0 TRACE: 00132:007377 0 600044370120 (EPP4 PR6|44,N*) 600044 370(0) 1 0 1 00
DBG(389312845)> CPU0 TRACE: 00132:007400 0 400240373520 (EPP7 PR4|240,N*) 400240 373(1) 1 0 1 00
DBG(389312847)> CPU0 TRACE: 00132:007401 0 777777450117 (STZ PR7|77777,7) 777777 450(0) 1 0 0 17
DBG(389312849)> CPU0 TRACE: 00132:007402 0 600224236100 (LDQ PR6|224) 600224 236(0) 1 0 0 00
DBG(389312851)> CPU0 TRACE: 00132:007403 0 600224054100 (AOS PR6|224) 600224 054(0) 1 0 0 00
DBG(389312853)> CPU0 TRACE: 00132:007404 0 000005116007 (CMPQ 000005,DL) 000005 116(0) 0 0 0 07
DBG(389312855)> CPU0 TRACE: 00132:007405 0 777771604004 (TMI 777771,IC) 777771 604(0) 0 0 0 04
DBG(389312857)> CPU0 TRACE: 00132:007376 0 600224727100 (LXL7 PR6|224) 600224 727(0) 1 0 0 00
DBG(389312859)> CPU0 TRACE: 00132:007377 0 600044370120 (EPP4 PR6|44,N*) 600044 370(0) 1 0 1 00
DBG(389312861)> CPU0 TRACE: 00132:007400 0 400240373520 (EPP7 PR4|240,N*) 400240 373(1) 1 0 1 00
DBG(389312863)> CPU0 TRACE: 00132:007401 0 777777450117 (STZ PR7|77777,7) 777777 450(0) 1 0 0 17
...
DBG(389313001)> CPU0 TRACE: 00132:007416 0 000005116007 (CMPQ 000005,DL) 000005 116(0) 0 0 0 07
DBG(389313003)> CPU0 TRACE: 00132:007417 0 777771604004 (TMI 777771,IC) 777771 604(0) 0 0 0 04

DBG(389313005)> CPU0 TRACE:       159   switchp = addr (scs$processor_switch_compare (1));/* set pointer */
DBG(389313005)> CPU0 TRACE: 00132:007420 0 700001371500 (EPP5 PR7|1) 700001 371(1) 1 0 0 00
DBG(389313007)> CPU0 TRACE: 00132:007421 0 600136651500 (SPRI5 PR6|136) 600136 651(1) 1 0 0 00

/* Find online CPU with mask set in this SCU */

          found = "0"b;
          do i = 1 to 4 while (^found);
               if cdata.eima_data (i).mask_available then   /* if this mask available */
                    if cdata.eima_data (i).mask_assigned then do; /* if this mask assigned */
                         do j = 0 to hbound (scs$processor_data, 1) while (^found);
                              pdp = addr (scs$processor_data (j));
                              if pdata.controller_port = cdata.eima_data (i).mask_assignment then
                                   if pdata.online then do; /* if mask assigned to this cpu and online */
                                        found = "1"b;
                                        scs$processor_test_data.mask_cpu = j;
                                   end;
                         end;
                    end;
                    else if cdata.type >= "0010"b then do;  /* mask not assigned to online cpu but avail. */
                         do j = 0 to hbound (scs$processor_data, 1) while (^found);
                              pdp = addr (scs$processor_data (j));
                              if pdata.online then do;      /* if this cpu is online, he is candidate for our mask cpu */
                                   found = "1"b;
                                   scs$processor_test_data.mask_cpu = j; /* save tag and assign mask to this cpu */
                                   call scr_util$assign_mask ((iscu), (pdata.controller_port));
                              end;
                         end;
                    end;
          end;
          if ^found then do;                                /* didn't find mask */
               rcode = rcerr_isolts_no_mask;
               return;
          end;

DBG(389313009)> CPU0 TRACE:       164   found = "0"b;
DBG(389313009)> CPU0 TRACE: 00132:007422 0 600140450100 (STZ PR6|140) 600140 450(0) 1 0 0 00

DBG(389313011)> CPU0 TRACE:       165   do i = 1 to 4 while (^found);
DBG(389313011)> CPU0 TRACE: 00132:007423 0 000001236007 (LDQ 000001,DL) 000001 236(0) 0 0 0 07
DBG(389313013)> CPU0 TRACE: 00132:007424 0 600126756100 (STQ PR6|126) 600126 756(0) 1 0 0 00
DBG(389313015)> CPU0 TRACE: 00132:007425 0 000000011003 (NOP 000000,DU) 000000 011(0) 0 0 0 03
DBG(389313017)> CPU0 TRACE: 00132:007426 0 600126236100 (LDQ PR6|126) 600126 236(0) 1 0 0 00
DBG(389313019)> CPU0 TRACE: 00132:007427 0 000004116007 (CMPQ 000004,DL) 000004 116(0) 0 0 0 07
DBG(389313021)> CPU0 TRACE: 00132:007430 0 000130605404 (TPNZ 000130,IC) 000130 605(1) 0 0 0 04
DBG(389313023)> CPU0 TRACE: 00132:007431 0 600140235100 (LDA PR6|140) 600140 235(0) 1 0 0 00
DBG(389313025)> CPU0 TRACE: 00132:007432 0 000126601004 (TNZ 000126,IC) 000126 601(0) 0 0 0 04

DBG(389313027)> CPU0 TRACE:       166        if cdata.eima_data (i).mask_available then /* if this mask available */
DBG(389313027)> CPU0 TRACE: 00132:007433 0 000011402007 (MPY 000011,DL) 000011 402(0) 0 0 0 07
DBG(389313029)> CPU0 TRACE: 00132:007434 0 600104373520 (EPP7 PR6|104,N*) 600104 373(1) 1 0 1 00
DBG(389313031)> CPU0 TRACE: 00132:007435 0 000000066506 (CMPB PR0|0,QL) 000000 066(1) 0 0 0 00
DBG(389313033)> CPU0 TRACE: 00132:007440 0 000116600004 (TZE 000116,IC) 000116 600(0) 0 0 0 04
DBG(389313035)> CPU0 TRACE: 00132:007441 0 600247756100 (STQ PR6|247) 600247 756(0) 1 0 0 00
DBG(389313037)> CPU0 TRACE: 00132:007442 0 000000066506 (CMPB PR0|0,QL) 000000 066(1) 0 0 0 00
DBG(389313039)> CPU0 TRACE: 00132:007445 0 000044600004 (TZE 000044,IC) 000044 600(0) 0 0 0 04

DBG(389313041)> CPU0 TRACE:       168                do j = 0 to hbound (scs$processor_data, 1) while (^found);
DBG(389313041)> CPU0 TRACE: 00132:007446 0 600127450100 (STZ PR6|127) 600127 450(0) 1 0 0 00
DBG(389313043)> CPU0 TRACE: 00132:007447 0 000000011003 (NOP 000000,DU) 000000 011(0) 0 0 0 03
DBG(389313045)> CPU0 TRACE: 00132:007450 0 600127236100 (LDQ PR6|127) 600127 236(0) 1 0 0 00
DBG(389313047)> CPU0 TRACE: 00132:007451 0 000007116007 (CMPQ 000007,DL) 000007 116(0) 0 0 0 07
DBG(389313049)> CPU0 TRACE: 00132:007452 0 000104605404 (TPNZ 000104,IC) 000104 605(1) 0 0 0 04
DBG(389313051)> CPU0 TRACE: 00132:007453 0 600140235100 (LDA PR6|140) 600140 235(0) 1 0 0 00
DBG(389313053)> CPU0 TRACE: 00132:007454 0 000102601004 (TNZ 000102,IC) 000102 601(0) 0 0 0 04

DBG(389313055)> CPU0 TRACE:       169                   pdp = addr (scs$processor_data (j));
DBG(389313055)> CPU0 TRACE: 00132:007455 0 600044370120 (EPP4 PR6|44,N*) 600044 370(0) 1 0 1 00
DBG(389313057)> CPU0 TRACE: 00132:007456 0 400010373566 (EPP7 PR4|10,*QL) 400010 373(1) 1 0 3 06
DBG(389313059)> CPU0 TRACE: 00132:007457 0 600102653500 (SPRI7 PR6|102) 600102 653(1) 1 0 0 00

DBG(389313061)> CPU0 TRACE:       170                   if pdata.controller_port = cdata.eima_data (i).mask_assignment then
DBG(389313061)> CPU0 TRACE: 00132:007460 0 600126236100 (LDQ PR6|126) 600126 236(0) 1 0 0 00
DBG(389313063)> CPU0 TRACE: 00132:007461 0 000011402007 (MPY 000011,DL) 000011 402(0) 0 0 0 07
DBG(389313065)> CPU0 TRACE: 00132:007462 0 600247756100 (STQ PR6|247) 600247 756(0) 1 0 0 00
DBG(389313067)> CPU0 TRACE: 00132:007463 0 600104371520 (EPP5 PR6|104,N*) 600104 371(1) 1 0 1 00
DBG(389313069)> CPU0 TRACE: 00132:007464 0 003100060506 (CSL PR0|3100,QL) 003100 060(1) 0 0 0 00
DBG(389313071)> CPU0 TRACE: 00132:007467 0 600056235100 (LDA PR6|56) 600056 235(0) 1 0 0 00
DBG(389313073)> CPU0 TRACE: 00132:007470 0 000104733000 (LRS 000104) 000104 733(0) 0 0 0 00
DBG(389313075)> CPU0 TRACE: 00132:007471 0 600247756100 (STQ PR6|247) 600247 756(0) 1 0 0 00
DBG(389313077)> CPU0 TRACE: 00132:007472 0 700000236100 (LDQ PR7|0) 700000 236(0) 1 0 0 00
DBG(389313079)> CPU0 TRACE: 00132:007473 0 000432377100 (ANAQ PR0|432) 000432 377(0) 1 0 0 00
DBG(389313081)> CPU0 TRACE: 00132:007474 0 600247116100 (CMPQ PR6|247) 600247 116(0) 1 0 0 00
DBG(389313083)> CPU0 TRACE: 00132:007475 0 000011601004 (TNZ 000011,IC) 000011 601(0) 0 0 0 04
DBG(389313085)> CPU0 TRACE: 00132:007476 0 700000235100 (LDA PR7|0) 700000 235(0) 1 0 0 00
DBG(389313087)> CPU0 TRACE: 00132:007477 0 400000315003 (CANA 400000,DU) 400000 315(0) 0 0 0 03
DBG(389313089)> CPU0 TRACE: 00132:007500 0 000006600004 (TZE 000006,IC) 000006 600(0) 0 0 0 04

DBG(389313091)> CPU0 TRACE:       172                           found = "1"b;
DBG(389313091)> CPU0 TRACE: 00132:007501 0 400000235003 (LDA 400000,DU) 400000 235(0) 0 0 0 03
DBG(389313093)> CPU0 TRACE: 00132:007502 0 600140755100 (STA PR6|140) 600140 755(0) 1 0 0 00

DBG(389313095)> CPU0 TRACE:       173                           scs$processor_test_data.mask_cpu = j;
DBG(389313095)> CPU0 TRACE: 00132:007503 0 600127236100 (LDQ PR6|127) 600127 236(0) 1 0 0 00
DBG(389313097)> CPU0 TRACE: 00132:007504 0 400040353520 (EPP3 PR4|40,N*) 400040 353(1) 1 0 1 00
DBG(389313099)> CPU0 TRACE: 00132:007505 0 300000752101 (STCQ PR3|0,AU) 300000 752(0) 1 0 0 01

DBG(389313101)> CPU0 TRACE:       175                end;
DBG(389313101)> CPU0 TRACE: 00132:007506 0 600127054100 (AOS PR6|127) 600127 054(0) 1 0 0 00
DBG(389313103)> CPU0 TRACE: 00132:007507 0 777741710004 (TRA 777741,IC) 777741 710(0) 0 0 0 04

DBG(389313105)> CPU0 TRACE:       168                do j = 0 to hbound (scs$processor_data, 1) while (^found);
DBG(389313105)> CPU0 TRACE: 00132:007450 0 600127236100 (LDQ PR6|127) 600127 236(0) 1 0 0 00
DBG(389313107)> CPU0 TRACE: 00132:007451 0 000007116007 (CMPQ 000007,DL) 000007 116(0) 0 0 0 07
DBG(389313109)> CPU0 TRACE: 00132:007452 0 000104605404 (TPNZ 000104,IC) 000104 605(1) 0 0 0 04
DBG(389313111)> CPU0 TRACE: 00132:007453 0 600140235100 (LDA PR6|140) 600140 235(0) 1 0 0 00
DBG(389313113)> CPU0 TRACE: 00132:007454 0 000102601004 (TNZ 000102,IC) 000102 601(0) 0 0 0 04

DBG(389313115)> CPU0 TRACE:       187   end;
DBG(389313115)> CPU0 TRACE: 00132:007556 0 600126054100 (AOS PR6|126) 600126 054(0) 1 0 0 00
DBG(389313117)> CPU0 TRACE: 00132:007557 0 777647710004 (TRA 777647,IC) 777647 710(0) 0 0 0 04

DBG(389313119)> CPU0 TRACE:       165   do i = 1 to 4 while (^found);
DBG(389313119)> CPU0 TRACE: 00132:007426 0 600126236100 (LDQ PR6|126) 600126 236(0) 1 0 0 00
DBG(389313121)> CPU0 TRACE: 00132:007427 0 000004116007 (CMPQ 000004,DL) 000004 116(0) 0 0 0 07
DBG(389313123)> CPU0 TRACE: 00132:007430 0 000130605404 (TPNZ 000130,IC) 000130 605(1) 0 0 0 04
DBG(389313125)> CPU0 TRACE: 00132:007431 0 600140235100 (LDA PR6|140) 600140 235(0) 1 0 0 00
DBG(389313127)> CPU0 TRACE: 00132:007432 0 000126601004 (TNZ 000126,IC) 000126 601(0) 0 0 0 04

DBG(389313129)> CPU0 TRACE:       188   if ^found then do;                              /* didn't find mask */
DBG(389313129)> CPU0 TRACE: 00132:007560 0 600140235100 (LDA PR6|140) 600140 235(0) 1 0 0 00
DBG(389313131)> CPU0 TRACE: 00132:007561 0 000005601004 (TNZ 000005,IC) 000005 601(0) 0 0 0 04
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