CAC 2015-04-28

rc9 regression

map355 x25_tables
MAP355

Error:  Illegal machine operation by gcos_slave_area_seg|33601 (in process dir)
Current instruction is:
 33601   033573716000     xec     33573  (illegal_opcode condition)
f7-undefined op. fault
map355: can't find assembly error count message
map355: There was an attempt to use an invalid segment number. Calling tssi_$fi
\cnish_segment.

DBG(15797015131961)> CPU TRACE: 00333:000000|033601 4 033573716000 (XEC 033573) 033573 716(0) 0 0 0 00
DBG(15797015131961)> CPU ADDRMOD: doComputedAddressFormation(Entry): operType:readCY TPR.CA=033573
DBG(15797015131961)> CPU ADDRMOD: doComputedAddressFormation(Entry): CT_HOLD 0
DBG(15797015131961)> CPU ADDRMOD: doComputedAddressFormation(startCA): TAG=00() Tm=0 Td=0
DBG(15797015131961)> CPU ADDRMOD: readOperands (XEC 033573):mne=xec flags=21
DBG(15797015131961)> CPU ADDRMOD: readOperands a 0 address 00033573
DBG(15797015131961)> CPU APPENDING: doAppendCycle(Entry) thisCycle=OPERAND_READ
DBG(15797015131961)> CPU APPENDING: doAppendCycle(Entry) lastCycle=INSTRUCTION_FETCH
DBG(15797015131961)> CPU APPENDING: doAppendCycle(Entry) CA 033573
DBG(15797015131961)> CPU APPENDING: doAppendCycle(Entry) n= 1
DBG(15797015131961)> CPU APPENDING: doAppendCycle(Entry) PPR.PRR=4 PPR.PSR=00333
DBG(15797015131961)> CPU APPENDING: doAppendCycle(Entry) TPR.TRR=4 TPR.TSR=00333
DBG(15797015131961)> CPU APPENDING: doAppendCycle(Entry) XSF 0
DBG(15797015131961)> CPU APPENDING: set TSR 00333 TRR 4
DBG(15797015131961)> CPU APPENDING: doAppendCycle(A)
DBG(15797015131961)> CPU APPENDING: fetchDSPTW segno 0333
DBG(15797015131961)> CPU CORE: core_read  16703534 612720401125 (fetchDSPTW)
DBG(15797015131961)> CPU APPENDING: fetchDSPTW x1 00 y1 0666 DSBR.ADDR 016703534 PTWx1 0612720401125 PTW0: ADDR 0612720 U 1 M 1 F 1 FC 1
DBG(15797015131961)> CPU APPENDING: fetchPSDW(0):segno=00333
DBG(15797015131961)> CPU CORE: core_read2 61272666 174047444444 (fetchPSDW)
DBG(15797015131961)> CPU CORE: core_read2 61272667 177777140000 (fetchPSDW)
DBG(15797015131961)> CPU APPENDING: fetchPSDW y1 0666 p->ADDR 0612720 SDW 0174047444444 0177777140000 ADDR 17404744 R 444 BOUND 017777 REWPUGC 1110011 F 1 FC 0 FE 1 USE 0
DBG(15797015131961)> CPU APPENDING: doAppendCycle(A) R1 4 R2 4 R3 4 E 1
DBG(15797015131961)> CPU APPENDING: doAppendCycle(B)
DBG(15797015131961)> CPU APPENDING: doAppendCycle(B):!STR-OP
DBG(15797015131961)> CPU APPENDING: doAppendCycle(G)
DBG(15797015131961)> CPU APPENDING: doAppendCycle(G) CA 033573
DBG(15797015131961)> CPU APPENDING: fetchPTW address 17404761
DBG(15797015131961)> CPU CORE: core_read  17404761 643760401105 (fetchPTW)
DBG(15797015131961)> CPU APPENDING: fetchPTW x2 015 y2 01573 sdw->ADDR 017404744 PTWx2 0643760401105 PTW0: ADDR 0643760 U 1 M 1 F 1 FC 1
DBG(15797015131961)> CPU APPENDING: doAppendCycle(I): FAP
DBG(15797015131961)> CPU APPENDING: doAppendCycle(H:FAP): (00333:033573) finalAddress=64377573
DBG(15797015131961)> CPU APPENDING: doAppendCycle(HI)
DBG(15797015131961)> CPU CORE: core_read  64377573 034100235743 (OPERAND_READ)
DBG(15797015131961)> CPU APPENDING: doAppendCycle (Exit) PRR 4 PSR 00333 P 0 IC 033601
DBG(15797015131961)> CPU APPENDING: doAppendCycle (Exit) TRR 4 TSR 00333 TBR 00 CA 033573
DBG(15797015131961)> CPU FINAL: Read (Actual) Read:  bar iefpFinalAddress=64377573  readData=034100235743
DBG(15797015131963)> CPU TRACE: 00333:000000|033601 4 034100235743 (??? PR0|34100,ITS) 034100 235(1) 1 1 2 03
DBG(15797015131963)> CPU APPENDING: doPtrReg(): PR[0] SNR=00234 RNR=4 WORDNO=012600 BITNO=00
DBG(15797015131963)> CPU APPENDING: doPtrReg(): n=0 offset=34100 TPR.CA=046700 TPR.TBR=0 TPR.TSR=00234 TPR.TRR=4
DBG(15797015131963)> CPU FAULT: Fault 10(012), sub 34359738368(0400000000000), dfc N, 'Illegal instruction'
DBG(15797015131963)> CPU FAULT: 00333:000000|033601 4 034100235743 (??? PR0|34100,ITS) 034100 235(1) 1 1 2 03
DBG(15797015131963)> CPU TRACE: MIF 0

Backtracking 033573:

DBG(15797015131951)> CPU TRACE: 00333:000000|033601 4 033573716000 (XEC 033573) 033573 716(0) 0 0 0 00

Operand read CAF:

DBG(15797015131951)> CPU ADDRMOD: doComputedAddressFormation(Entry): operType:readCY TPR.CA=033573
DBG(15797015131951)> CPU ADDRMOD: doComputedAddressFormation(Entry): CT_HOLD 0
DBG(15797015131951)> CPU ADDRMOD: doComputedAddressFormation(startCA): TAG=00() Tm=0 Td=0
DBG(15797015131951)> CPU ADDRMOD: readOperands (XEC 033573):mne=xec flags=21
DBG(15797015131951)> CPU ADDRMOD: readOperands a 0 address 00033573

Operand read AP:

DBG(15797015131951)> CPU APPENDING: doAppendCycle(Entry) thisCycle=OPERAND_READ
DBG(15797015131951)> CPU APPENDING: doAppendCycle(Entry) lastCycle=INSTRUCTION_FETCH
DBG(15797015131951)> CPU APPENDING: doAppendCycle(Entry) CA 033573
DBG(15797015131951)> CPU APPENDING: doAppendCycle(Entry) n= 1
DBG(15797015131951)> CPU APPENDING: doAppendCycle(Entry) PPR.PRR=4 PPR.PSR=00333
DBG(15797015131951)> CPU APPENDING: doAppendCycle(Entry) TPR.TRR=4 TPR.TSR=00333
DBG(15797015131951)> CPU APPENDING: doAppendCycle(Entry) XSF 0
DBG(15797015131951)> CPU APPENDING: set TSR 00333 TRR 4
DBG(15797015131951)> CPU APPENDING: doAppendCycle(A)
DBG(15797015131951)> CPU APPENDING: fetchDSPTW segno 0333
DBG(15797015131951)> CPU CORE: core_read  16703534 612720401125 (fetchDSPTW)
DBG(15797015131951)> CPU APPENDING: fetchDSPTW x1 00 y1 0666 DSBR.ADDR 016703534 PTWx1 0612720401125 PTW0: ADDR 0612720 U 1 M 1 F 1 FC 1
DBG(15797015131951)> CPU APPENDING: fetchPSDW(0):segno=00333
DBG(15797015131951)> CPU CORE: core_read2 61272666 174047444444 (fetchPSDW)
DBG(15797015131951)> CPU CORE: core_read2 61272667 177777140000 (fetchPSDW)
DBG(15797015131951)> CPU APPENDING: fetchPSDW y1 0666 p->ADDR 0612720 SDW 0174047444444 0177777140000 ADDR 17404744 R 444 BOUND 017777 REWPUGC 1110011 F 1 FC 0 FE 1 USE 0
DBG(15797015131951)> CPU APPENDING: doAppendCycle(A) R1 4 R2 4 R3 4 E 1
DBG(15797015131951)> CPU APPENDING: doAppendCycle(B)
DBG(15797015131951)> CPU APPENDING: doAppendCycle(B):!STR-OP
DBG(15797015131951)> CPU APPENDING: doAppendCycle(G)
DBG(15797015131951)> CPU APPENDING: doAppendCycle(G) CA 033573
DBG(15797015131951)> CPU APPENDING: fetchPTW address 17404761
DBG(15797015131951)> CPU CORE: core_read  17404761 643760401105 (fetchPTW)
DBG(15797015131951)> CPU APPENDING: fetchPTW x2 015 y2 01573 sdw->ADDR 017404744 PTWx2 0643760401105 PTW0: ADDR 0643760 U 1 M 1 F 1 FC 1
DBG(15797015131951)> CPU APPENDING: doAppendCycle(I): FAP
DBG(15797015131951)> CPU APPENDING: doAppendCycle(H:FAP): (00333:033573) finalAddress=64377573
DBG(15797015131951)> CPU APPENDING: doAppendCycle(HI)
DBG(15797015131951)> CPU CORE: core_read  64377573 034100236052 (OPERAND_READ)
DBG(15797015131951)> CPU APPENDING: doAppendCycle (Exit) PRR 4 PSR 00333 P 0 IC 033601
DBG(15797015131951)> CPU APPENDING: doAppendCycle (Exit) TRR 4 TSR 00333 TBR 00 CA 033573
DBG(15797015131951)> CPU FINAL: Read (Actual) Read:  bar iefpFinalAddress=64377573  readData=034100236052

What is this append cycle?

DBG(15797015131951)> CPU APPENDING: doAppendCycle(Entry) thisCycle=OPERAND_READ
DBG(15797015131951)> CPU APPENDING: doAppendCycle(Entry) lastCycle=OPERAND_READ
DBG(15797015131951)> CPU APPENDING: doAppendCycle(Entry) CA 033573
DBG(15797015131951)> CPU APPENDING: doAppendCycle(Entry) n= 1
DBG(15797015131951)> CPU APPENDING: doAppendCycle(Entry) PPR.PRR=4 PPR.PSR=00333
DBG(15797015131951)> CPU APPENDING: doAppendCycle(Entry) TPR.TRR=4 TPR.TSR=00333
DBG(15797015131951)> CPU APPENDING: doAppendCycle(Entry) XSF 0
DBG(15797015131951)> CPU APPENDING: set TSR 00333 TRR 4
DBG(15797015131951)> CPU APPENDING: doAppendCycle(A)
DBG(15797015131951)> CPU APPENDING: fetchDSPTW segno 0333
DBG(15797015131951)> CPU CORE: core_read  16703534 612720401125 (fetchDSPTW)
DBG(15797015131951)> CPU APPENDING: fetchDSPTW x1 00 y1 0666 DSBR.ADDR 016703534 PTWx1 0612720401125 PTW0: ADDR 0612720 U 1 M 1 F 1 FC 1
DBG(15797015131951)> CPU APPENDING: fetchPSDW(0):segno=00333
DBG(15797015131951)> CPU CORE: core_read2 61272666 174047444444 (fetchPSDW)
DBG(15797015131951)> CPU CORE: core_read2 61272667 177777140000 (fetchPSDW)
DBG(15797015131951)> CPU APPENDING: fetchPSDW y1 0666 p->ADDR 0612720 SDW 0174047444444 0177777140000 ADDR 17404744 R 444 BOUND 017777 REWPUGC 1110011 F 1 FC 0 FE 1 USE 0
DBG(15797015131951)> CPU APPENDING: doAppendCycle(A) R1 4 R2 4 R3 4 E 1
DBG(15797015131951)> CPU APPENDING: doAppendCycle(B)
DBG(15797015131951)> CPU APPENDING: doAppendCycle(B):!STR-OP
DBG(15797015131951)> CPU APPENDING: doAppendCycle(G)
DBG(15797015131951)> CPU APPENDING: doAppendCycle(G) CA 033573
DBG(15797015131951)> CPU APPENDING: fetchPTW address 17404761
DBG(15797015131951)> CPU CORE: core_read  17404761 643760401105 (fetchPTW)
DBG(15797015131951)> CPU APPENDING: fetchPTW x2 015 y2 01573 sdw->ADDR 017404744 PTWx2 0643760401105 PTW0: ADDR 0643760 U 1 M 1 F 1 FC 1
DBG(15797015131951)> CPU APPENDING: doAppendCycle(I): FAP
DBG(15797015131951)> CPU APPENDING: doAppendCycle(H:FAP): (00333:033573) finalAddress=64377573
DBG(15797015131951)> CPU APPENDING: doAppendCycle(HI)
DBG(15797015131951)> CPU CORE: core_read  64377573 034100236052 (OPERAND_READ)
DBG(15797015131951)> CPU APPENDING: doAppendCycle (Exit) PRR 4 PSR 00333 P 0 IC 033601
DBG(15797015131951)> CPU APPENDING: doAppendCycle (Exit) TRR 4 TSR 00333 TBR 00 CA 033573
DBG(15797015131951)> CPU FINAL: Read (Actual) Read:  bar iefpFinalAddress=64377573  readData=034100236052

Why are we doing an update IT?

DBG(15797015131951)> CPU ADDRMOD: update IT indword=034100236052
DBG(15797015131951)> CPU ADDRMOD: update IT size=40 offset=2 Yi=034100
DBG(15797015131951)> CPU ADDRMOD: update IT tally now 2357

DBG(15797015131951)> CPU APPENDING: doAppendCycle(Entry) thisCycle=OPERAND_STORE
DBG(15797015131951)> CPU APPENDING: doAppendCycle(Entry) lastCycle=OPERAND_READ
DBG(15797015131951)> CPU APPENDING: doAppendCycle(Entry) CA 033573
DBG(15797015131951)> CPU APPENDING: doAppendCycle(Entry) n= 1
DBG(15797015131951)> CPU APPENDING: doAppendCycle(Entry) PPR.PRR=4 PPR.PSR=00333
DBG(15797015131951)> CPU APPENDING: doAppendCycle(Entry) TPR.TRR=4 TPR.TSR=00333
DBG(15797015131951)> CPU APPENDING: doAppendCycle(Entry) XSF 0
DBG(15797015131951)> CPU APPENDING: doAppendCycle(A)
DBG(15797015131951)> CPU APPENDING: fetchDSPTW segno 0333
DBG(15797015131951)> CPU CORE: core_read  16703534 612720401125 (fetchDSPTW)
DBG(15797015131951)> CPU APPENDING: fetchDSPTW x1 00 y1 0666 DSBR.ADDR 016703534 PTWx1 0612720401125 PTW0: ADDR 0612720 U 1 M 1 F 1 FC 1
DBG(15797015131951)> CPU APPENDING: fetchPSDW(0):segno=00333
DBG(15797015131951)> CPU CORE: core_read2 61272666 174047444444 (fetchPSDW)
DBG(15797015131951)> CPU CORE: core_read2 61272667 177777140000 (fetchPSDW)
DBG(15797015131951)> CPU APPENDING: fetchPSDW y1 0666 p->ADDR 0612720 SDW 0174047444444 0177777140000 ADDR 17404744 R 444 BOUND 017777 REWPUGC 1110011 F 1 FC 0 FE 1 USE 0
DBG(15797015131951)> CPU APPENDING: doAppendCycle(A) R1 4 R2 4 R3 4 E 1
DBG(15797015131951)> CPU APPENDING: doAppendCycle(B)
DBG(15797015131951)> CPU APPENDING: doAppendCycle(B):STR-OP
DBG(15797015131951)> CPU APPENDING: doAppendCycle(G)
DBG(15797015131951)> CPU APPENDING: doAppendCycle(G) CA 033573
DBG(15797015131951)> CPU APPENDING: fetchPTW address 17404761
DBG(15797015131951)> CPU CORE: core_read  17404761 643760401105 (fetchPTW)
DBG(15797015131951)> CPU APPENDING: fetchPTW x2 015 y2 01573 sdw->ADDR 017404744 PTWx2 0643760401105 PTW0: ADDR 0643760 U 1 M 1 F 1 FC 1
DBG(15797015131951)> CPU APPENDING: doAppendCycle(I): FAP
DBG(15797015131951)> CPU APPENDING: doAppendCycle(H:FAP): (00333:033573) finalAddress=64377573
DBG(15797015131951)> CPU APPENDING: doAppendCycle(HI)
DBG(15797015131951)> CPU CORE: core_write 64377573 034100235743 (OPERAND_STORE)
DBG(15797015131951)> CPU APPENDING: doAppendCycle (Exit) PRR 4 PSR 00333 P 0 IC 033601
DBG(15797015131951)> CPU APPENDING: doAppendCycle (Exit) TRR 4 TSR 00333 TBR 00 CA 033573
DBG(15797015131951)> CPU FINAL: Write(Actual) Write: bar iefpFinalAddress=64377573 writeData=034100235743
DBG(15797015131951)> CPU ADDRMOD: update IT wrote tally word 034100235743 to 033573

The tally word we updated is the operand of the XEC. Not good.

hra crash

type
tst842
hra

hdl36:    lda       2,du
" 045230:
" L68: Store CU history
" DPS8: Store CU history
" Overwritten
hdl34:    scpr      hdl7,n*   
          ada       hdl34
          sta       hdl34
          lda       2,du      " 000002235003 "    " "002cq3"
" L68: Store OU history
" DPS8: Store OU/DU history
" Overwritten
hdl35:    scpr      hdl8,f1
          ada       hdl35
          sta       hdl35

" The limit check -- compare the instruction just stored and up next
" to hdl22
" L68: Store OU history
" DPS8: Store OU/DU history
          sba       hdl22
" 045240:
          tze       hdl29
          tra       hdl36

DBG(23323937795)> CPU TRACE: 1: 045227 000002235003 (LDA 000002,DU) 000002 235(0) 0 0 0 03^M
DBG(23323937795)> CPU REGDUMPAQI: A=000002000000 Q=000000000000 IR:Abs ~BAR OMASK ^M
DBG(23323937797)> CPU CORE: core_read2 20045230 046246452020 (Read2)^M
DBG(23323937797)> CPU CORE: core_read2 20045231 045230075000 (Read2)^M

DBG(23323937755)> CPU TRACE: 1: 045230 046244452020 (SCPR 046244,N*) 046244 452(0) 0 0 1 00^M
DBG(23323937755)> CPU CORE: core_write2 20046244 000000235000 (Write2)^M
DBG(23323937755)> CPU CORE: core_write2 20046245 000031270000 (Write2)^M
DBG(23323937755)> CPU REGDUMPAQI: A=000002000000 Q=000000000000 IR:Abs ~BAR OMASK ^M
DBG(23323937757)> CPU CORE: core_read  20045231 045230075000 (Read)^M

DBG(23323937759)> CPU TRACE: 1: 045231 045230075000 (ADA 045230) 045230 075(0) 0 0 0 00^M
DBG(23323937759)> CPU CORE: core_read  20045230 046244452020 (Read)^M
DBG(23323937759)> CPU TRACE: Add36b op1 000002000000 op2 046244452020 carryin 0 flagsToSet 740000 flags 004220 ovf 0^M
DBG(23323937759)> CPU TRACE: Add36b res 046246452020 flags 004220 ovf 0^M
DBG(23323937759)> CPU REGDUMPAQI: A=046246452020 Q=000000000000 IR:Abs ~BAR OMASK ^M
DBG(23323937761)> CPU CORE: core_read2 20045232 045230755000 (Read2)^M
DBG(23323937761)> CPU CORE: core_read2 20045233 000002235003 (Read2)^M

DBG(23323937763)> CPU TRACE: 1: 045232 045230755000 (STA 045230) 045230 755(0) 0 0 0 00^M
DBG(23323937763)> CPU CORE: core_write 20045230 046246452020 (Write)^M
DBG(23323937763)> CPU REGDUMPAQI: A=046246452020 Q=000000000000 IR:Abs ~BAR OMASK ^M
DBG(23323937765)> CPU CORE: core_read  20045233 000002235003 (Read)^M

DBG(23323937767)> CPU TRACE: 1: 045233 000002235003 (LDA 000002,DU) 000002 235(0) 0 0 0 03^M
DBG(23323937767)> CPU REGDUMPAQI: A=000002000000 Q=000000000000 IR:Abs ~BAR OMASK ^M
DBG(23323937769)> CPU CORE: core_read2 20045234 046444452040 (Read2)^M
DBG(23323937769)> CPU CORE: core_read2 20045235 045234075000 (Read2)^M

DBG(23323937771)> CPU TRACE: 1: 045234 046444452040 (SCPR 046444,F1) 046444 452(0) 0 0 2 00^M
DBG(23323937771)> CPU CORE: core_write2 20046444 000000000000 (Write2)^M
DBG(23323937771)> CPU CORE: core_write2 20046445 000000000000 (Write2)^M
DBG(23323937771)> CPU REGDUMPAQI: A=000002000000 Q=000000000000 IR:Abs ~BAR OMASK ^M
DBG(23323937773)> CPU CORE: core_read  20045235 045234075000 (Read)^M

DBG(23323937775)> CPU TRACE: 1: 045235 045234075000 (ADA 045234) 045234 075(0) 0 0 0 00^M
DBG(23323937775)> CPU CORE: core_read  20045234 046444452040 (Read)^M
DBG(23323937775)> CPU TRACE: Add36b op1 000002000000 op2 046444452040 carryin 0 flagsToSet 740000 flags 004220 ovf 0^M
DBG(23323937775)> CPU TRACE: Add36b res 046446452040 flags 004220 ovf 0^M
DBG(23323937775)> CPU REGDUMPAQI: A=046446452040 Q=000000000000 IR:Abs ~BAR OMASK ^M
DBG(23323937777)> CPU CORE: core_read2 20045236 045234755000 (Read2)^M
DBG(23323937777)> CPU CORE: core_read2 20045237 045242175000 (Read2)^M

DBG(23323937779)> CPU TRACE: 1: 045236 045234755000 (STA 045234) 045234 755(0) 0 0 0 00^M
DBG(23323937779)> CPU CORE: core_write 20045234 046446452040 (Write)^M
DBG(23323937779)> CPU REGDUMPAQI: A=046446452040 Q=000000000000 IR:Abs ~BAR OMASK ^M
DBG(23323937781)> CPU CORE: core_read  20045237 045242175000 (Read)^M

DBG(23323937783)> CPU TRACE: 1: 045237 045242175000 (SBA 045242) 045242 175(0) 0 0 0 00^M
DBG(23323937783)> CPU CORE: core_read  20045242 046634452040 (Read)^M
DBG(23323937783)> CPU REGDUMPAQI: A=777612000000 Q=000000000000 IR:Abs ~BAR OMASK Neg ^M
DBG(23323937785)> CPU CORE: core_read2 20045240 045252600000 (Read2)^M
DBG(23323937785)> CPU CORE: core_read2 20045241 045227710000 (Read2)^M

The limit value is 777612000000

DBG(23323937787)> CPU TRACE: 1: 045240 045252600000 (TZE 045252) 045252 600(0) 0 0 0 00^M
DBG(23323937787)> CPU REGDUMPAQI: A=777612000000 Q=000000000000 IR:Abs ~BAR OMASK Neg ^M
DBG(23323937789)> CPU CORE: core_read  20045241 045227710000 (Read)^M

DBG(23323937791)> CPU TRACE: 1: 045241 045227710000 (TRA 045227) 045227 710(0) 0 0 0 00^M
DBG(23323937791)> CPU CORE: core_read  20045227 000002235003 (Read)^M
DBG(23323937791)> CPU TRACE: ReadTraOp 00000:045227^M
DBG(23323937791)> CPU REGDUMPAQI: A=777612000000 Q=000000000000 IR:Abs ~BAR OMASK Neg ^M
DBG(23323937793)> CPU CORE: core_read  20045227 000002235003 (Read)^M

DBG(23323937795)> CPU TRACE: 1: 045227 000002235003 (LDA 000002,DU) 000002 235(0) 0 0 0 03^M
DBG(23323937795)> CPU REGDUMPAQI: A=000002000000 Q=000000000000 IR:Abs ~BAR OMASK ^M
DBG(23323937797)> CPU CORE: core_read2 20045230 046246452020 (Read2)^M
DBG(23323937797)> CPU CORE: core_read2 20045231 045230075000 (Read2)^M
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